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uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 1 features ? organized 65,536 x 8 ? high-reliability mil-prf-38535 processing ? single +5v 10% power supply ? pin-compatible with existing 512k read-only memories (roms) and electrically programmable roms (eproms) ? all inputs/outputs fully ttl compatible ? power-saving cmos technology ? very high-speed snap! pulse programming ? 3-state output buffers ? 400mv minimum dc noise immunity with standard ttl loads ? latchup immunity of 250ma on all input and output lines ? low power dissipation (cmos input levels) 3 active - 193mw (max) 3 standby - 1.7mw (max) options marking ? timing 150ns access -15 200ns access -20 250ns access -25 ? package(s) ceramic dip (600mils) j no. 110 ? operating temperature ranges military (-55 o c to +125 o c) m pin assignment (top view) available as military specifications ? smd 5962-87648 ? mil-std-883 512k uveprom uv erasable programmable read-only memory for more products and information please visit our web site at www.micross.com general description the SMJ27C512 is a set of 65536 by 8-bit (524,288-bit), ultraviolet (uv) light erasable, electrically programmable read-only memories. these devices are fabricated using power- saving cmos technology for high speed and simple interface with mos and bipolar circuits. all inputs (including program data inputs can be driven by series 54 ttl circuits without the use of external pullup resistors. each output can drive one series 54 ttl circuit without external resistors. the data out- puts are 3-state for connecting multiple devices to a common bus. the SMJ27C512 is pin-compatible with existing 28-pin 512k roms and eproms. because this eprom operates from a single 5v supply (in the read mode), it is ideal for use in microprocessor-based systems. one other supply (13v) is needed for programming. all programming signals are ttl level. this device is pro- grammable by the snap! pulse programming algorithm. the snap! pulse programming algorithm uses a v pp of 13v and a v cc of 6.5v for a nominal programming time of seven sec- onds. for programming outside the system, existing eprom programmers can be used. locations may be programmed singly, in blocks, or at random. 28-pin dip (j) 600-mils 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 a15 a12 a7 a6 a5 a4 a3 a2 a1 a0 dq0 dq1 dq2 gnd vcc a14 a13 a8 a9 a11 g\/v pp a10 e\ dq7 dq6 dq5 dq4 dq3 pin name function a0 - a15 address inputs da0-dq7 inputs (programming)/outputs e\ chip enable/power down gnd ground g\ /v pp output enable/13v programming v cc 5v power supply
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 2 functional block diagram* operation the seven modes of operation for the SMJ27C512 are listed in table 1. the read mode requires a single 5v supply. all inputs are ttl level except for v pp during programming (13v for snap! pulse), and 12v on a9 for signature mode. table 1. operation modes * x can be v il or v ih a0 a1 a2 a3 a4 a5 dq0 a6 dq1 a7 dq2 a8 dq3 a9 dq4 a10 dq5 a11 dq6 a12 dq7 a13 a14 a15 e\ g\ /v pp & 10 [pwr dwn] 9 8 7 6 5 4 3 25 24 21 23 2 26 27 1 20 22 en a a a a a a a a 11 12 13 15 16 17 18 19 eprom 65,536 x 8 0 15 a 0 65,535 read output disable standby programming verify program inhibit e\ (20) v il v il v ih v il v il v ih g\ /v pp (22) v il v ih x v pp v il v pp v cc (28) v cc v cc v cc v cc v cc v cc a9 (24) x x x x x x v id v id a0 (10) x x x x x x v il v ih mfg device 97h 85h data in data out high-z code function (pins) signature mode mode* dq0-dq7 (11-13, 15-19) v cc v il v il data out high-z high-z * this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12.
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 3 read/output disable when the outputs of two or more SMJ27C512 are connected in parallel on the same bus, the output of any particular device in the circuit can be read with no interference from competing outputs of the other devices. to read the output of the selected SMJ27C512, a low-level signal is applied to the e\ and g\ / v pp . all other devices in the circuit should have their outputs disabled by applying a high-level signal to one of these pins. output data is accessed at pins dq0 through dq7. latchup immunity latchup immunity on the SMJ27C512 is a minimum of 250ma on all inputs and outputs. this feature provides latchup im- munity beyond any potential transients at the printed circuit board level when the eprom is interfaced to industry-standard ttl or mos logic devices. input/output layout approach controls latchup without compromising performance or pack- ing density. power down active i cc supply current can be reduced from 35ma to 500 a(ttl-level inputs) or 300 a (cmos-level inputs) by applying a high ttl/cmos signal to the e\ pin. in this mode all outputs are in the high-impedance state. erasure before programming, the smj27512 is erased by exposing the chip through the transparent lid to a high-intensity ultraviolet (uv) light (wavelength 2537 ?). eprom erasure before programming is necessary to assure that all bits are in the logic-high state. logic lows are programmed into the desired locations. a programmed logic low can be erased only by ul- traviolet light. the recommended minimum exposure dose (uv intensity x exposure time) is 15 w . s/cm 2 . a typical 12mw/cm 2 , lterless uv lamp erases the device in 21 minutes. the lamp should be located about 2.5cm above the chip during erasure. after erasure, all bits are in the high state. it should be noted that normal ambient light contains the correct wavelength for erasure; therefore, when using the SMJ27C512, the window should be covered with an opaque label. snap! pulse programming the SMJ27C512 is programmed using the snap! pulse programming algorithm as illustrated by the owchart in figure 1. this algorithm programs in a nominal time of seven seconds. actual programming time varies as a function of the programmer used. data is presented in parallel (eight bits) on pins dq0 to dq7. once addresses and data are stable, e\ is pulsed. the snap! pulse programming algorithm uses an initial pulse of 100 s followed by a byte veri cation to determine when the addressed byte has been successfully programmed. up to ten 100 s pulses per byte are provided before a failure is recognized. the programming mode is achieved when g\ /v pp = 1 3 v , v cc = 6.5v, and e\ = v il . more than one device can be pro- grammed when the devices are connected in parallel. locations can be programmed in any order. when the snap! pulse pro- gramming routine is complete, all bits are veri ed with v cc = 5v, g\ /v pp = v il , and e\ = v il . program inhibit programming can be inhibited by maintaining high level input on e\. program verify programmed bits can be veri ed with g\ /v pp and e\ = v il . signature mode the signature mode provides access to a binary code identifying the manufacturer and device type. this mode is activated when a9 (terminal 24) is forced to 12v 0.5v. two identi er bytes are accessed by a0 (terminal 10); i.e., a0 = v il accesses the manufacturer code, which is output on dq0- dq7; a0 = v ih accesses the device code, which is also output on dq0-dq7. all other addresses must be held at v il . each byte possesses odd parity on bit dq7. the manufacturer code for these devices is 97h and the device code is 85h.
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 4 figure 1. snap! pulse programming flow chart start address = first location increment address x = 0 last address? v cc = 5v 0.5v, g\ /v pp = v il compare all bytes to original data device passed increment address address = first location v cc = 6.5v 0.25v, g\ /v pp = 13v 0.25v program one pulse = t w = 100 s last address? x = x+1 x = 10? program one pulse = t w = 100 s no fail no yes verify word no pass device failed yes yes pass fail program mode interactive mode final verification
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 5 *stresses greater than those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this speci cation is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. ** all voltage values are with respect to gnd. absolute maximum ratings* supply voltage range, v cc **...........................-0.6v to +7.0v supply voltage range, v pp **.........................-0.6v to +14.0v input voltage range, all inputs except a9 ** ....-0.6v to 6.5v a9....-0.6v to +13.5v output voltage range**...............................-0.6v to v cc +1v operating cage temperature range, t c .........-55c to 125c storage temperature range, t stg .....................-65c to 150c recommended operating conditions notes: 1. v cc must be applied before or at the same time as g\ /v pp and removed after or at the same time as g\ /v pp . the deivce must not be inserted into or removed from the board when g\ /v pp or v cc is applied. 2. g\ /v pp can be connected to v cc directly (except in the program mode). v cc supply current in this case is i cc + i pp . electrical characteristics over recommended ranges of operating conditions notes: 1. typical values are at t c =25c and nominal voltages. 2. this parameter has been characterized at 25c and is not production tested. min nom max unit 4.5 5 5.5 v 6.25 6.5 6.75 v g\ /v pp supply voltage 2 12.75 13 13.25 v v id 11.5 12.5 v ttl 2 v cc +1 v cmos v cc -0.2 v cc +1 v ttl -0.5 0.8 v cmos -0.5 0.2 v t c -55 125 c v cc read mode snap! pulse programming algorithm supply voltage 1 v il low-level dc input voltage operating case temperature snap! pulse programming algorithm high-level dc input voltage v ih voltage level on a9 for signature mode test conditions min typ 1 max v oh i oh = -400 a 2.4 v ol i ol = 2.1ma 0.4 i i v i = 0v to 5.5v 10 i o v o = 0v to v cc 10 i pp g\ /v pp = 13v 35 70 ttl-input level v cc = 5.5v, e\=v ih 500 cmos-input level v cc = 5.5v, e\=v cc 325 i cc2 e\=v il , v cc =5.5v t cycle = minimum cycle time, outputs open 35 50 high-level output voltage low-level output voltage v cc supply current (active) parameter i cc1 v cc supply current (standby) input current (leakage) g\ /v pp supply current (during program pulse) 2 output current (leakage)
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 6 capacitance over recommended ranges of supply voltage and operating case temperature, f = 1mhz* * capacitance measurements are made on sample basis only. ** all typical values are at t c = 25c and nominal voltages. switching characteristics over recommended ranges of supply volt- age and operating case temperature notes: 1. timing measurements are made at 2v for logic high and 0.8v for logic low. (see figure 2) 2. common test conditions apply for t dis except during programming. 3. value calculated from 0.5v delta to measured output level. this parameter is only sampled and not 100% tested. recommended timing requirements for programming: v cc = 6.5v and g\ /v pp = 13v (snap! pulse), t c = 25c (see figure 2) test conditions typ** unit c i input capacitance v i = 0v 6pf c o output capacitance v o = 0v 10 pf c g /v pp g\ /v pp input capacitance g\ /v pp = 0v 20 pf parameter min max min max min max t a(a) access time from address 150 200 250 ns t a(e) access time from e\ 150 200 250 ns t en(g) output enable time from g\ /v pp 70 75 100 ns t dis output disable time from g\ /v pp or e\, whichever occurs first 3 050060060 ns t v(a) output data valid time after change of address, e\, or g\, whichever occurs first 3 000 ns unit test conditions 1,2 parameter -15 -25 see figure 2 -20 min nom max unit t dis(e) 0 130 ns t h(a) 0 s t h(d) 2 s t h(vpp) 2 s t w(ipgm) 95 100 105 s t rec(pg) 2 s t su(a) 2 s t su(d) 2 s t su(vpp) 2 s t su(vcc) 2 s t v(eld) 1 s t r(pg) 50 ns pulse duration, initial program data valid from e\ low output disable time from e\ hold time, address recovery time, g\ /v pp hold time, data hold time, g\ /v pp setup time, address setup time, data setup time, g\ /v pp setup time, v cc g\ /v pp rise time
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 7 parameter measurement information notes: 1. c l includes probe and xture capacitance. 2.08v output under test r l = 800 cl = 100 pf 1 figure 3. read-cycle timing ac testing inputs are driven at 2.4v for logic high and 0.4v for logic low. timing measurements are made at 2v for logic high and 0.8v for logic low for both inputs and outputs. figure 2. load circuit and voltage waveform
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 8 figure 4. program-cycle timing (snap! pulse programming) notes: 1. g\ /v pp = 13v and v cc = 6.5v for snap! pulse programming.
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 9 mechanical definition* note: these dimensions are per the smd. micross? package dimensional limits may differ, but they will be within the smd limits. *all measurements are in inches. micross case #110 (package designator j) smd 5962-87648, case outline x s2 a q l e b b2 s1 ea c d e pin 1
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 10 *available processes m = extended temperature range -55 o c to +125 o c ordering information device number speed ns package type operating temp. SMJ27C512 -15 j * SMJ27C512 -20 j * SMJ27C512 -25 j * example: SMJ27C512-25jm
uveprom SMJ27C512 smj27512 rev. 1.2 01/10 micross components reserves the right to change products or speci cations without notice. 11 micross to dscc part number cross reference* micross package designator j ti part #** smd part # SMJ27C512-15jm 5962-8764801xa SMJ27C512-20jm 5962-8764802xa SMJ27C512-25jm 5962-8764803xa * micross part number is for reference only. orders received referencing the smd part number will be processed per the smd. ** parts are listed on smd under the old texas instruments part number. micross purchased this product line in november of 199 9.

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